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CY74FCT823CTSOC
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MFG:CYERESS Package Cooled:SMD D/C:00+

CY7 Series Datasheet download

Five Points

Part Number: CY74FCT823CTSOC

MFG: CYERESS

Package Cooled: SMD

D/C: 00+

Description: This bus-interface register is designed to eliminate the extra packages required to buffer existing re...

CY74FCT823CTSOC General Description

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a 9-bit-wide buffered register with clock-enable (EN) and clear (CLR) inputs that are ideal for parity bus interfacing in high-performance microprogrammed systems. This device is ideal for use as an output port requiring high IOL/IOH.

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

CY74FCT823CTSOC Maximum Ratings

Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, JA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Q package . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.

CY74FCT823CTSOC Features

` Function, Pinout, and Drive Compatible
   With FCT, F Logic, and AM29823
` Reduced VOH (Typically = 3.3 V) Version of
   Equivalent FCT Functions
` Edge-Rate Control Circuitry for
   Significantly Improved Noise
   Characteristics
` Ioff Supports Partial-Power-Down Mode Operation
` Matched Rise and Fall Times
` Fully Compatible With TTL Input and
   Output Logic Levels
` ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
` 64-mA Output Sink Current
   32-mA Output Source Current
` High-Speed Parallel Register With
   Positive-Edge-Triggered D-Type Flip-Flops
` Buffered Common Clock-Enable (EN) and
   Asynchronous-Clear (CLR) Inputs

CY74FCT823CTSOC Connection Diagram

CY74FCT823CTSOC datasheet

CY700SMS
PDF/DataSheet Download

Datasheet: CY700SMS
File Size: 311542 KB
Manufacturer: POWER-ONE [Power-One]
Click here to Download

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