CY7B9945V

• 500 ps max. Total Timing Budget™ (TTB™) window
• 24200 MHz input/output operation
• Low output-output skew < 200 ps
• 10 + 1 LVTTL outputs driving 50 terminated lines
• Dedicated feedback output
• Phase adjustments in 625/1300 ps steps up to +10.4 ns
• 3.3V LVTTL/LVPECL, fault-tolerant, and hot-insertable reference inputs
• Multiply/divide ratios of 16, 8, 10, and 12
• Individual output bank disable
• Output high-impedance option for testing purposes
• Integrated phase-locked loop (PLL) with lock indicator
• Low cycle-cycle jitter (<100 ps peak-peak)
• 3.3V operation
• Industrial temperature range: 40°C to +85°C
• 52-pin 1.4-mm TQFP package

The CY7B9945V high-speed multi-phase PLL clock buffer offers user-selectable control over system clock functions. This multiple-output clock driver provides the system integrator with functions of CY7B9945V necessary to optimize the timing of high-performance computer and communication systems.

The CY7B9945V features a guaranteed maximum TTB window specifying all occurrences of output clocks with respect to the input reference clock across variations in output frequency, supply voltage, operating temperature, input edge rate, and process.

Ten configurable outputs of CY7B9945V each drive terminated transmission lines with impedances as low as 50 while delivering minimal and specified output skews at LVTTL levels. The outputs are arranged in two banks of four and six outputs. These banks allow a divide function of 1 to 12, with phase adjustments in 625-ps1300-ps increments up to ±10.4 ns. The dedicated feedback output of CY7B9945V allows divide-by functionality from 1 to 12 and limited phase adjustments. However, if needed, any one of the ten outputs can be connected to the feedback input as well as driving other inputs.

Selectable reference input of CY7B9945V is a fault-tolerant feature which allows smooth change over to secondary clock source, when the primary clock source is not in operation. The reference inputs and feedback inputs are configurable to accommodate both LVTTL or Differential (LVPECL) inputs. The completely integrated PLL CY7B9945V reduces jitter and simplifies board layout.