CY7C1009B

The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE₁), an active HIGH Chip Enable (CE₂), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE₁) and Write Enable (WE) inputs LOW and Chip Enable Two (CE₂) input HIGH. Data on the eight I/O pins (I/O₀ through I/O₇) is then written into the location specified on the address pins (A₀ through A₁₆).

Reading from the device is accomplished by taking Chip Enable One (CE₁) and Output Enable (OE) LOW while forcing  Write Enable (WE) and Chip Enable Two (CE₂) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O₀ through I/O₇) are placed in a high-impedance state when the device is deselected (CE₁  HIGH or CE₂ LOW), the outputs are disabled (OE HIGH), or during a write operation (CE₁ LOW, CE₂HIGH, and WE LOW).

The CY7C109B is available in standard 400-mil-wide SOJ and 32-pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package. The CY7C1009B and CY7C109B are functionally equivalent in all other respects.