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CY7C192

Features: • High speed -12 ns• CMOS for optimum speed/power• Low active power -880 mW• Low standby power -220 mW• TTL-compatible inputs and outputs• Automatic power-down when deselectedPinoutSpecifications(Above which the useful life may be impaired. For user gu...

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SeekIC No. : 004320252 Detail

CY7C192: Features: • High speed -12 ns• CMOS for optimum speed/power• Low active power -880 mW• Low standby power -220 mW• TTL-compatible inputs and outputs• Automatic pow...

CY7C192 Data Sheet

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Part Number:
CY7C192
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed
   -12 ns
• CMOS for optimum speed/power
• Low active power
   -880 mW
• Low standby power
   -220 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ..................................... −65°C to +150°C
Ambient Temperature with
Power Applied.................................................. −55°C to +125°C
Supply Voltage to Ground Potential
(Pin 28 to Pin 14).................................................−0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ....................................... −0.5V to VCC + 0.5V
DC Input Voltage[1].................................... −0.5V to VCC + 0.5V
Output Current into Outputs (LOW) ............................. 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA


Description

The CY7C192 is a high-performance CMOS static RAM organized as 65,536 x 4 bits with separate I/O. Easy memory expansion is provided by active LOW Chip Enable (CE) and three-state drivers. CY7C1317CV18, CY7C1917CV18, CY7C1319CV18, and CY7C1321CV18  has an automatic power-down feature, reducing the power consumption by 75% when deselected. Writing to the device is accomplished when the Chip Enable (CE) and write enable (WE) inputs are both LOW.

Data on the four input pins (I0 through I3) of CY7C192 is written into the memory location specified on the address pins (A0 through A15).

Reading the CY7C192 is accomplished by taking the Chip Enable (CE) LOW while the Write Enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the four data output pins.

The output pins of CY7C192 stay in high-impedance state when Write Enable (WE) is LOW, or Chip Enable (CE) is HIGH.

A die coat is used to insure alpha immunity.




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