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CY7C197N

Features: • High speed- 25 ns• CMOS for optimum speed/power• Low active power- 880 mW• Low standby power- 220 mW• TTL-compatible inputs and outputs• Automatic power-down when deselectedPinoutSpecifications(Above which the useful life may be impaired. For user gu...

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SeekIC No. : 004320261 Detail

CY7C197N: Features: • High speed- 25 ns• CMOS for optimum speed/power• Low active power- 880 mW• Low standby power- 220 mW• TTL-compatible inputs and outputs• Automatic pow...

CY7C197N Data Sheet

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Part Number:
CY7C197N
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

• High speed
- 25 ns
• CMOS for optimum speed/power
• Low active power
- 880 mW
• Low standby power
- 220 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected


Pinout

Connection Diagram


Specifications

(Above which the useful life may be impaired. For user guidelines,not tested.)
Storage Temperature ..............................65°C to +150°C
Ambient Temperature with
Power Applied...........................................55°C to +125°C
Supply Voltage to Ground Potential
(Pin 24 to Pin 12) ........................................... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ...................................0.5V to VCC + 0.5V
DC Input Voltage[1] .............................. 0.5V to VCC + 0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... >200 mA


Description

The CY7C197N is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C197N has an automatic power-down feature, reducing the power consumption by 75% when deselected.

Writing to the CY7C197N  is accomplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A17).

Reading the  CY7C197N is accomplished by taking chip enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data output (DOUT) pin.

The output pin stays in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW.The CY7C197N utilizes a die coat to insure alpha immunity.




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