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Part Number: CY7C199C
Description: The CY7C199C is a high-performance CMOS Asynchronous SRAM organized as 32K by 8 bits that supports an ...
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CY7C199C
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DataSheet
General Description
CY7C199C General Description
The CY7C199C is a high-performance CMOS Asynchronous SRAM organized as 32K by 8 bits that supports an asynchronous memory interface. The device features an automatic power-down feature that significantly reduces power consumption when deselected.
See the Truth Table in this data sheet for a complete description of read and write modes.
The CY7C199C is available in 28 DIP, 28 SOJ, and 28 TSOP I package(s).
CY7C199C Maximum Ratings
|
Parameter |
Description |
Value |
Unit |
|
TSTG |
Storage Temperature |
65 to +150 |
°C |
|
TAMB |
Ambient Temperature with Power Applied (i.e., case temperature) |
55 to +125 |
°C |
|
VCC |
Core Supply Voltage Relative to VSS |
0.5 to +7.0 |
V |
|
VIN, VOUT |
DC Voltage Applied to any Pin Relative to VSS |
0.5 to VCC + 0.5 |
V |
|
IOUT |
Output Short-Circuit Current |
20 |
mA |
|
VESD |
Static Discharge Voltage (per MIL-STD-883, Method 3015) |
> 2001 |
V |
|
ILU |
Latch-up Current |
> 200 |
mA |
CY7C199C Features
• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTLcompatible Inputs and Outputs
• Available in 28 DIP, 28 SOJ, and 28 TSOP I packages
• Also available in Lead-Free 28 DIP
• 2.0V Data Retention
• Low CMOS standby power
• Automated Power-down when deselected
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTLcompatible Inputs and Outputs
• Available in 28 DIP, 28 SOJ, and 28 TSOP I packages
• Also available in Lead-Free 28 DIP
• 2.0V Data Retention
• Low CMOS standby power
• Automated Power-down when deselected
CY7C199C Connection Diagram
CY7C199C
PDF/DataSheet Download
- Datasheet: CY7C199C
- File Size: 262269 KB
- Manufacturer: CYPRESS
- Click here to Download
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