CY7C277

The CY7C277 is a high-performance 32K word by 8-bit CMOS PROMs. The  CY7C277 is packaged in the slim 28-pin 300-mil package.

The ceramic package may be equipped with an erasure window; when exposed to UV light, the PROM is erased and can then be reprogrammed. The memory cells of  CY7C277 utilize proven EPROM floating-gate technology and byte-wide algorithms.

The CY7C277 offers the advantages of low power, superior performance, and high programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be 100% tested, as each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that the product will meet DC and AC specification limits after customer programming.

On the 7C277, the outputs are pipelined through a master- slave register. On the rising edge of CP, data is loaded into the 8-bit edge triggered output register. The E/ES input provides a programmable bit to select between asynchronous and synchronous operation. The default condition is asynchronous.

When the asynchronous mode is selected, the E/ES pin operates as an asynchronous output enable. If the synchronous mode is selected, the E/ES pin is sampled on the rising edge of CP to enable and disable the outputs. The 7C277 also provides a programmable bit to enable the Address Latch input.

If this bit is not programmed, the  CY7C277 will ignore the ALE pin and the address will enter the  CY7C277  asynchronously. If the ALE function is selected, the address enters the PROM while the ALE pin is active, and is captured when ALE is deasserted.

The user may define the polarity of the ALE signal, with the default being active HIGH.