CY7C287

The CY7C287 is a high-performance 64K x 8 CMOS PROM.

The CY7C287 is equipped with an output register and an output enable that can be programmed to be synchronous (E_S) or asynchronous (E). It is available in a 28-pin, 300-mil package. The address set-up time is 45 ns and the time from clock HIGH to output valid is 15 ns.

The CY7C287 is available in a cerDIP package equipped with an erasure window to provide reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed.

The memory cells utilize proven EPROM floating- gate technology and byte-wide intelligent programming algorithms.

The CY7C287 offers the advantage of low power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be 100% tested with each cell being programmed, erased, and repeatedly exercised prior to encapsulation.

Each PROM is also tested for AC performance to guarantee that the product will meet DC and AC specification limits after customer programming.

Reading the CY7C287 is accomplished by placing an active LOW signal on E/E_S. The contents of the memory location addressed by the address lines (A₀ - A₁₅) will become available on the output lines (O₀ - O₇) on the next rising of CP.