MFG:CYPRESS Package Cooled:PLCC D/C:05/06+
MFG: CYPRESS
Package Cooled: PLCC
D/C: 05/06+
Description: The CY7C343 is a high-performance, high-density erasableprogrammable logic device, available in 44-pin PLCC and HLCC packages....
(Above which the useful life may be impaired. For user guide-lines, not tested.)
Storage Temperature ................................65°C to +150°C
Ambient Temperature with
Power Applied..................................................0°C to +70°C
Maximum Junction Temperature
(Under Bias).................................................................150°C
Supply Voltage to Ground Potential............... 2.0V to +7.0V
Maximum Power Dissipation................................. ..2500 mW
DC VCC or GND Current..................................... .... ..500 mA
DC Output Current, per Pin..................... 25 mA to +25 mA
DC Input Voltage[1]........................................3.0V to +7.0V
DC Program Voltage.................................................... .13.0V
Static Discharge Voltage...........................................> 1100V
(per MILSTD883, method 3015)
CY7C343
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The CY7C342B is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device. The MAX® architecture is 100% user-configurable, allowing the CY7C342B to ccommodate a variety of independent ...
The CY7C342-30JC is one member of the CY7C342 family and CY7C342-30JC is designed as the erasable programmable logic device that has some points of features:(1)128 macrocells in eight logic array blocks (LABs); (2)Eight dedicated inputs, 52 bidirectional I/O...
The CY7C342 is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within theCY7C342. The MAX architecture is 100% user configurable, allowing the devices to accommodate a variety of independent logic ...
The CY7C341B is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within theCY7C341B. The MAX® architecture is 100% user-configurable, allowing the devices to accom- modate a variety of independe...
The CY7C341 is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within theCY7C341. The MAX architecture is 100% user-configurable, allowing the devices to accommodate a variety of independent logic ...
The Cypress Multiple Array Matrix (MAX®)CY7C340 family of EPLDs provides a user-configurable, high-density solution to general- purpose logic integration requirements. With the combination of innovative architecture and state-of-the-art process, the MAX ...
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