CY7C64713 Selling Leads, Price trend, CY7C64713 DataSheet download, circuit diagram from SeekIC.com

Features: • Single-chip integrated USB transceiver, SIE, and enhanced 8051 microprocessor• Fit, form and function upgradable to the FX2LP (CY7C68013A) -Pin-compatible -Object-code-compatible -Functionally-compatible (FX1 functionality is a Subset of the FX2LP)• Draws no more than...

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SeekIC No. : 004320501 Detail

CY7C64713: Features: • Single-chip integrated USB transceiver, SIE, and enhanced 8051 microprocessor• Fit, form and function upgradable to the FX2LP (CY7C68013A) -Pin-compatible -Object-code-compat...

CY7C64713 Data Sheet

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Part Number:: CY7C64713
Supply Ability:: 5000

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Qty
1~5000

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Negotiable

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Upload time: 2024/4/19

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Product Details

Description

Features:

• Single-chip integrated USB transceiver, SIE, and
   enhanced 8051 microprocessor
• Fit, form and function upgradable to the FX2LP (CY7C68013A)
   -Pin-compatible
   -Object-code-compatible
   -Functionally-compatible (FX1 functionality is a Subset of the FX2LP)
• Draws no more than 65 mA in any mode making the FX1
   suitable for bus powered applications
• Software: 8051 runs from internal RAM, which is:
   -Downloaded via USB
   -Loaded from EEPROM
   -External memory device (128-pin configuration only)
• 16 KBytes of on-chip Code/Data RAM
• Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints
   -Buffering options: double, triple, and quad
• Additional programmable (BULK/INTERRUPT) 64-byte endpoint
• 8- or 16-bit external data interface
• Smart Media Standard ECC generation
• GPIF
   -Allows direct connection to most parallel interfaces; 8- and 16-bit
   -Programmable waveform descriptors and configuration
registers to define waveforms
   -Suppo rts multiple Ready (RDY) inputs and Control (CTL) outputs
• Integrated, industry standard 8051 with enhanced features
   -Up to 48-MHz clock rate
   -Four clocks per instruction cycle
   -Two USARTS
   -Three counter/timers
   -Expanded interrupt system
   -Two data pointers
• 3.3V operation with 5V tolerant inputs
• Smart SIE
• Vectored USB interrupts
• Separate data buffers for the Setup and DATA portions
   of a CONTROL transfer
• Integrated I2C controller, runs at 100 or 400 KHz
• 48-MHz, 24-MHz, or 12-MHz 8051 operation
• Four integrated FIFOs
   -Brings glue and FIFOs inside for lower system cost
   -Automatic conversion to and from 16-bit buses
   -Master or slave operation
   -FIFOs can use externally supplied clock or asynchronous strobes
   -Easy interface to ASIC and DSP ICs
• Vectored for FIFO and GPIF interrupts
• Up to 40 general purpose I/Os
• Three package options-128-pin TQFP, 100-pin TQFP,
   and 56-pin QFN Lead-free

Application

• DSL modems
• ATA interface
• Memory card readers
• Legacy conversion devices
• Home PNA
• Wireless LAN
• MP3 players
• Networking

Specifications

Storage Temperature............................ 65°C to +150°C
Ambient Temperature with Power Supplied ...................0°C to +70°C
Supply Voltage to Ground Potential .......................0.5V to +4.0V
DC Input Voltage to Any Input Pin ...........................5.25V[12]
DC Voltage Applied to Outputs
in High-Z State ...............................0.5V to V_CC + 0.5V
Power Dissipation ................................... 235 mW
Static Discharge Voltage ................................ > 2000V
Max Output Current, per I/O port............................. 10 mA
Max Output Current, all five I/O ports
(128- and 100-pin packages) ...............................50 mA

Description

integrated, USB microcontroller. By integrating the USB transceiver, CY7C64713 serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost-effective solution that provides superior time-to-market advantages. Because it incorporates the USB transceiver, the EZ-USB FX1 CY7C64713 is more economical, providing a smaller footprint solution than USB SIE or external transceiver implementations. With EZ-USB FX1, the Cypress Smart SIE handles most of the USB protocol in hardware, freeing the embedded microcontroller for application-specific functions and decreasing development time to ensure USB compatibility.

The General Programmable Interface (GPIF) and Master/ Slave Endpoint FIFO (8- or 16-bit data bus)CY7C64713 provides an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors.

Three lead-free packages of CY7C64713 are defined for the family: 56 QFN,100 TQFP, and 128 TQFP.

CY7C64713

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