CY7C9335A

The CY7C9335A is a CMOS integrated circuit designed to decode SMPTE-125M bit-parallel digital characters (or other data formats) using the SMPTE-259M decoding rules. Following decoding, the characters are framed by locating the 30-bit TRS pattern in the parallel character stream. The framed characters are then output.

The inputs of the CY7C9335A are designed to be directly mated to a CY7B9334 HOTLink receiver, which converts the SMPTE-259M compatible high-speed serial data stream into 10-bit parallel characters.

The CY7C9335A  performs both TRS (sync) detection and framing, data descrambling with the SMPTE-259M X9+X4+1 algorithm, and NRZI-to-NRZ decoding. These functions operate at a 27 MHz character rate. For those systems operating with non-SMPTE-259M compliant video streams (or for diagnostic purposes), the descrambler and NRZI decoding functions can be disabled.

The CY7C9335A also contains the necessary multiplexers, control inputs and outputs, to control a DVB-ASI-compliant video stream. DVB-ASI operation is enabled through activation of a single input signal. This allows a single serial-to-parallel input port to support both SMPTE and DVB data streams under software or hardware control.

In DVB-ASI mode the CY7C9335A automatically enables both the 8B/10B decoder and multibyte framer present in the CY7B9334 receiver/deserializer. All error detection, fill, and command codes are detected and output by the CY7C9335A.

The CY7C9335A operates from a single +5V supply. It is available in a 100-pin TQFP space saving package.