DM86LS62

  These DM86LS62 circuits are TRI-STATE edge-triggered 8-bit IO reg-isters in parallel with 8-bit serial shift registers which are capable of operating in any of the following modes parallel load from IO pins to register "A" parallel transfer down from register "A" to serial shift register "B" parallel transfer upfromshiftregister "B" toregister "A" serialshiftofregis-ter "B" or exchange data between register "A" and shift register "B" Since the registers are edge-triggered by the positive transition of the clock the control lines which deter-mine the mode or operation are completely independent of the logic level applied to the clock Designed for bus-orient-ed systems these DM86LS62 circuits have their TRI-STATE inputs and outputs on the same pins