DM9000A General Description
DM9000A Features
· 48-pin LQFP
· Supports processor interface: byte/word of I/O command to internal memory data operation
· Integrated 10/100M transceiver with AUTO-MDIX
· Supports back pressure mode for half-duplex mode flow control
· IEEE802.3x flow control for full-duplex mode
· Supports wakeup frame, link status change and magic packet events for remote wake up
· Integrated 16K Byte SRAM
· Build in 3.3V to 2.5V regulator
· Supports early Transmit
· Supports IP/TCP/UDP checksum generation and checking
· Supports automatically load vendor ID and product ID from EEPROM
· Optional EEPROM configuration
· Very low power consumption mode:
· Power reduced mode (cable detection)
· Power down mode
· Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.
· Compatible with 3.3V and 5.0V tolerant I/O
DM9000A Connection Diagram
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