DP8344B

Features:

Transceiver
·Software configurable for 3270, 3299, 5250 and general 8-bit protocols
· Fully registered status and control
· On-chip analog line receiver

Processor
· 20 MHz clock (50 ns T-states)
· Max. instruction cycle: 200 ns
· 33 instruction types (50 total opcodes)
· ALU and barrel shifter
· 64k x 8 data memory address range
· 64k x 16 program memory address range (note: typical system requires k2k program memory)
· Programmable wait states
· Soft-loadable program memory
· Interrupt and subroutine capability
· Stand alone or host operation
· Flexible bus interface with on-chip arbitration logic

General
· Low power microCMOS; typ. ICC e 25 mA at 20 MHz
· 84-pin plastic leaded chip carrier (PLCC) package


Pinout




Specifications

Supply Voltage (VCC)                                             -0.5Vto+7.0V
DC Input Voltage (VIN) or                                -0.5to VCC +0.5V
DC Input Diode Current                                                  ±20 mA
DC Output Voltage (VOUT) or                      -0.5V to VCC + 0.5V
DC Output Current, per Pin (IOUT)                                 ±20 mA
DC VCC or GND Current, per Pin                                    ±50 mA
Storage Temperature Range (TSTG)                   -65 to a150
Power Dissipation (PD)                                                  500 mW
Lead Temperature (Soldering, 10 sec)                                260
ESD Tolerance: CZAP e 120 pF,
                        RZAP e 1500                                         2.0 kV


Description

The DP8344B BCP is a communications processor designed to efficiently process IBMÉ 3270, 3299 and 5250 communications protocols. A general purpose 8-bit protocol is also supported. The DP8344B BCP integrates a 20 MHz 8-bit Harvard architecture RISC processor, and an intelligent, software-configurable transceiver on the same low power microCMOS chip. The transceiver DP8344B is capable of operating without significant processor interaction, releasing processor power for other tasks. Fast and flexible interrupt and subroutine capabilities with on-chip stacks make this power readily available.

The transceiver  is mapped into the DP8344B's register space, communicating with the DP8344B via an asynchronous interface which enables both sections of the chip to run from different clock sources. The transmitter and receiver run at the same basic clock frequency although the receiver extracts a clock from the incoming data stream to ensure timing accuracy.

The DP8344B BCP is designed to stand alone and is capable of implementing a complete communications interface, using the DP8344B's spare power to control the complete system. Alternatively, the DP8344B BCP can be interfaced to another processor with an on-chip interface controller arbitrating access to data memory. Access to program memory is also possible, providing the ability to download BCP code. A simple line interface connects the BCP to the communications line. The receiver includes an on-chip analog comparator, suitable for use in a transformer-coupled environment, although a TTL-level serial input is also provided for applications where an external comparator is preferred.

A typical system is shown below. Both coax and twinax line interfaces are shown, as well as an example of the (optional) remote processor DP8344B  interface.