DP8406

Features:

· Detects and corrects single-bit errors
· Detects and flags dual-bit errors
· Built-in diagnostic capability
· Fast write and read cycle processing times
· Byte-write capability
· Guaranteed 4000V minimum ESD protection
· Fully pin and function compatible with TI's SN74ALS632A thru SN74ALS635 series


Pinout




Specifications

Storage Temperature                                -65 to +150
Ambient Temperature under Bias               -55 to +125
Junction Temperature under Bias               -55 to +175
VCC Pin Potential to
     Ground Pin                                            -0.5V to +7.0V
Input Voltage (Note 2)                                -0.5V to +7.0V
Input Current (Note 2)                         -30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V)
Standard Output                                              -0.5V to V_CC
TRI-STATE Output                                        -0.5V to +5.5V
Current Applied to Output
    in LOW State (Max)                    twice the rated IOL (mA)
ESD Last Passing Voltage (Min)                                  4000V


Description

The DP8406 device is a 32-bit parallel error detection and correction circuit (EDAC) in a 52-pin or 68-pin package. The DP8406 uses a modified Hamming code to generate a 7-bit check word from a 32-bit data word. This check word is stored along with the data word during the memory write cycle. During the memory read cycle, the 39-bit words from memory are processed by the DP8406 to determine if errors have occurred in memory.

Single-bit errors in the 32-bit data word are flagged and corrected. Single-bit errors in the 7-bit check word are flagged, and the CPU sends the DP8406 through the correction cycle even though the 32-bit data word is not in error. The correction cycle will simply pass along the original 32-bit data word in this case and produce error syndrome bits to pinpoint the error-generating location.

Dual-bit errors are flagged but not corrected. These errors may occur in any two bits of the 39-bit word from memory (two errors in the 32-bit data word, two errors in the 7-bit check word, or one error in each word). The gross-error condition of all LOWs or all HIGHs from memory will be detected. Otherwise, errors in three or more bits of the 39-bit word are beyond the capabilities of these DP8406s to detect.

Read-modify-write (byte-control) operations can be performed by using output latch enable, LEDBO, and the individual OEB0 through OEB3 byte control pins.

Diagnostics are performed on the DP8406s by controls and internal paths that allow the user to read the contents of the Data Bit and Check Bit input latches. These will determine if the failure occurred in memory or in the DP8406.