DS2009

The DS2009 512*9 FIFO chip implements a first-in,first-out algorithm featuring asynchronous read/write operations,fully,empty and half-full flags,and unlimited expansion capability in both word size and depth.The main application of the DS2009 is as a rate buffer,sourcing and absorbing data at different rates (e.g.,interfacing fast processor and slow peripherals).The full and empty flags are provided to prevent data overflow and underflow.A half-full flag is available in the sigle-device and width-expansion configurations.The data is loaded and emptied on a first-in,first-out (FIFO) basis, and the latency for the retrieval of data is approximately one load cycle (write).Since the writes and reads are internally sequential,thereby requiring no address information,the pinout definition will serve this and future higher-density devices.The ninth bit is provided to support control or parity functions.

The DS2009 has 12 features.The first one is first-in,first-out memory-based architecture.The second one is flexible 512*9 organization.The third one is low-power HCMOS technology.The fourth one is asynchronous and simultaneous read/write.The fifth one is bidirectional applications.The sixth one is fully expandable by word width or depth.The seventh one is fully expandable by word width or depth.The eighth one is empty and full warning flags.The ninth one is half-full flag capability in single-device mode.The tenth one is retransmit capability.The eleventh one is high performance.The twelfth one is available in 35 ns,50 ns,65 ns,80 ns,and 120 ns access time.The last one is optional industrial temperature range -40 to +85 available,designated N.