DSP56F802

The DSP56F802 is a member of the DSP56800 core-based family of Digital Signal Processors (DSPs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost, configuration flexibility, and compact program code, the DSP56F802 is well-suited for many applications. The DSP56F802 includes many peripherals that are especially useful for applications such as motion control, home appliances, encoders, tachometers, limit switches, power supply and control, engine management, and industrial control for power, lighting, automation and HVAC.

The DSP56800 core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP and MCU applications. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications.

The DSP56F802 supports program execution from either internal or external memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. The DSP56F802 also provides and up to 4 General Purpose Input/Output (GPIO) lines, depending on peripheral configuration.

The DSP56F802 DSP controller includes 8K words (16-bit) of program Flash and 2K words of Data Flash (each programmable through the JTAG port) with 1K words of both program and data RAM. A total of 2K words of Boot Flash is incorporated for easy customer-inclusion of field-programmable software routines that can be used to program the main program and data flash memory areas. Both program and data flash memories can be independently bulk erased or erased in page sizes of 256 words. The Boot Flash memory can also be either bulk or page erased.

A key application-specific feature of the DSP56F802 is the inclusion of a Pulse Width Modulator (PWM) module. This modules incorporates six complementary, individually programmable PWM signal outputs to enhance motor control functionality. Complementary operation permits programmable dead-time insertion, and separate top and bottom output polarity control. The up-counter value is programmable to support a continuously variable PWM frequency. Both edge and center aligned synchronous pulse width control (0% to 100% modulation) are supported. The device is capable of controlling most motor types: ACIM (AC Induction Motors), both BDC and BLDC (Brush and Brushless DC motors), SRM and VRM (Switched and Variable Reluctance Motors), and stepper motors. The PWMs incorporate fault protection with sufficient output drive capability to directly drive standard opto-isolators. A "smoke-inhibit", write-once protection feature for key parameters is also included. The PWM is double-buffered and includes interrupt control to permit integral reload rates to be programmable from 1 to 16. The PWM modules provide a reference output to synchronize the Analog-to-Digital Converters.

The DSP56F802 incorporates two 12-bit Analog-to-Digital Converters (ADCs) with a total of five channels. A full set of standard programmable peripherals is provided that include a Serial Communications Interface (SCI), and two Quad Timers. Any of these interfaces can be used as General-Purpose Input/Outputs (GPIO) if that function is not required. An on-chip relaxation oscillator eliminates the need for an external crystal.