EP1K50QC208-3N

The EP1K50QC208-3N is designed as one kind of programmable logic device that provides a die-efficient, low-cost architecture by combining look-up table (LUT) architecture with EABs. And this device is configured at system power-up with data stored in an Altera serial configuration device or provided by a system controller.

Features of the EP1K50QC208-3N are:(1)Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions; (2)Dual-port capability with up to 16-bit width per embedded array block (EAB); (3)Logic array for general logic functions; (4)10,000 to 100,000 typical gates; (5)Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be used without reducing logic capacity); (6)Cost-optimized process; (7)Low cost solution for high-performance communications applications; (8)Low power consumptionBidirectional I/O performance (setup time [tSU] and clock-tooutput delay [tCO]) up to 250 MHz; (9)Clamp to VCCIO user-selectable on a pin-by-pin basis; (10)Supports hot-socketing.etc.

The absolute maximum ratings of the EP1K50QC208-3N can be summarized as:(1)Supply voltage: -0.5 to 3.6 V;(2)DC input voltage: -2.0 to 5.75 V;(3)DC output current, per pin: -25 to 25 mA;(4)Storage temperature: 65 to 150 °C;(5)Ambient temperature: 65 to 135 °C;(6)Junction temperature: 135 °C. If you want to know more information such as the electrical characteristics about the EP1K50QC208-3N, please download the datasheet in www.seekic.com or www.chinaicmart.com.