EP1S25F672C7

The EP1S25F672C7 is designed as one kind of FPGAs that based on a 1.5-V, 0.13-m, all-layer copper SRAM process, with densities of up to 79,040 logic elements (LEs) and up to 7.5 Mbits of RAM. This device contains a two-dimensional row- and column-based architecture to implement custom logic (consists of LABs, with 10 logic elements (LEs) in each LAB).

Features of the EP1S25F672C7 are:(1)10,570 to 79,040 LEs;(2)up to 7,427,520 RAM bits (928,440 bytes) available without reducing logic resources;(3)up to 16 global clocks with 22 clocking resources per device region;(4)up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switchover, real-time PLL reconfiguration, and advanced multiplication and phase shifting;(5)support for numer-ous single-ended and differential I/O standards;(6)high-speed differential I/O support on up to 116 channels with up to 80 channels optimized for 840 megabits per second (Mbps);(7)differential on-chip termination support for LVDS;(8)support for 133-MHz PCI-X 1.0 in -5 speed-grade devices;(9)support for 100-MHz PCI-X 1.0 in -6 and faster speed-grade devices;(10)support for remote configuration updates.

The absolute maximum ratings of the EP1S25F672C7 can be summarized as:(1)supply voltage (VCCINT):-0.5 to 2.4 V;(2)supply voltage (VCCIO):-0.5 to 4.6 V;(3)DC input voltage:-0.5 to 4.6 V;(4)DC output current, per pin:-25 to 40 mA;(5)storage temperature:-65 to 150 °C;(6)junction temperature:135 °C. If you want to know more information such as the electrical characteristics about the EP1S25F672C7, please download the datasheet in www.seekic.com or www.chinaicmart.com .