EPCS1 General Description
EPCS1 Features
1- and 4-Mbit flash memory devices that serially configure CycloneTM FPGAs
Easy-to-use four-pin interface
Low cost, low pin count and non-volatile memory
Low current during configuration and near-zero standby mode current
3.3-V operation
Available in 8-pin small outline integrated circuit (SOIC) package
Enables the Nios® processor to access unused flash memory through active serial (AS) memory interface
Re-programmable memory with more than 100,000 erase/program cycles
Programming support with ByteBlasterTM II download cable
Additional programming support with the Altera® Programming Unit (APU) and programming hardware from BP Microsystems, System General, and other vendors
Software design support with the Altera Quartus® II development system for Windows-based PCs as well as Sun SPARC station and HP 9000 Series 700/800
Delivered with the memory array erased (all the bits set to 1)
Map list: ABCDEFGHIJKLMNOPQRSTUVWXYZ 0123456789All