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MFG:FSC Package Cooled:1999
Part Number: FDG6303N
MFG: FSC
Package Cooled: 1999
Description: These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchil...
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FDG6303N
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DataSheet
General Description
FDG6303N General Description
These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs.
FDG6303N Maximum Ratings
|
Symbol |
Parameter |
FDG6303N |
Units | |
|
VDSS VGSS |
Drain-Source Voltage Gate-Source Voltage |
25 8 0.5 1.5 0.3 -55 to 150 6.0 |
V V A W °C kV | |
|
ID |
Drain Current Continuous Pulsed | |||
|
PD |
Power Dissipation for Single Operation | (Note 1) | ||
| TJ,TSTG ESD |
Operating and Storage Junction Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf/1500O) | |||
THERMAL CHARACTERISTICS
| RJA | Thermal Resistance, Junction-to-Ambient |
415 |
°C/W |
FDG6303N Features
·25 V, 0.50 A continuous, 1.5 A peak. RDS(ON) = 0.45 W @ VGS= 4.5 V, RDS(ON) =0.60 W @ VGS= 2.7 V.
·Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V).
·Gate-Source Zener for ESD ruggedness (>6kV Human Body Model).
·Compact industry standard SC70-6 surface mount package.
·Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V).
·Gate-Source Zener for ESD ruggedness (>6kV Human Body Model).
·Compact industry standard SC70-6 surface mount package.
FDG6303N Connection Diagram
FDG6303N
PDF/DataSheet Download
- Datasheet: FDG6303N
- File Size: 232373 KB
- Manufacturer: FAIRCHILD [Fairchild Semiconductor]
- Click here to Download
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