FPD6836SOT343

¹TAmbient = 22°C unless otherwise noted ²Max. RF Input Limit must be further limited if input V_SWR > 2.5:1
³Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: P_TOT (P_DC + P_IN) P_OUT, where
                                                   P_DC: DC Bias Power
                                                   P_IN: RF Input Power
                                                   P_OUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
                                                   P_TOT=0.5W (0.0056W/°C) x T_PACK
where THS = heatsink or ambient temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 85°C heatsink temperature: P_TOT = 0.5W (0.0056 x (65 22)) = 0.26W

The FPD6836SOT343 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 m x 360 m Schottky barrier Gate, defined by high-resolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and input power levels. The FPD6836SOT343 is available in die form and in other packages.

FPD6836SOT343 applications include drivers or output stages in PCS/Cellular base station high-interceptpoint LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.