FSTUD32450

Select pins S0, S1, S2, S3, S4 and S5 are intended to be used as static user configurable control pins. The AC performance of these pins has not been characterized or tested. Switching of these select pins during system operation may temporarily disrupt output logic states and/or enable pin controls. 40-bit configuration can be achieved by connecting the OE1 and the OE6 pins to together.

The Fairchild Universal Bus Switch FSTUD32450 provides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit...40-bit of high-speed
CMOS TTL-compatible bus switching. The low On Resistance of the FSTUD32450 allows inputs to be connected to outputswithout adding propagation delay or generating additional ground bounce noise.

The FSTUD32450 is designed to allow "customer" configuration control of the enable connections. The device can be organized as either a ten 4-bit, eight 5-bit, four 10-bit, two 20-bit or one 40-bit enabled bus switch.  lso chievable are 8-bit and 16-bit enabled configurations (see Functional Description). FSTUD32450's bit configuration is controlled through select pin logic. (see Truth Table). When OEx is LOW, Port Ax is connected to Port Bx. When OEx is HIGH, the switch is OPEN.

The A and B Ports of FSTUD32450 are protected against undershoot to support an extended range to 2.0V below ground. Fairchild's integrated Undershoot Hardened Circuit (UHC) senses undershoot at the I/O, and responds by preventing voltage differentials from developing and turning the switch on.

Another innovative FSTUD32450 feature is the addition of a level shifting select pin, "S2 and S5". When S2 and S5 are LOW, the FSTUD32450 behaves as a standard N-MOS switch. When S2 and S5 are HIGH, a diode to VCC is integrated into the circuit allowing for level shifting between 5V inputs and 3.3V outputs.