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Part Number: GTLP2T152
Description: The GTLP2T152 is a 2-bit transceiver that provides LVTTL-to-GTLP signal level translation. Data directional control ishandled with a trans...
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GTLP2T152
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General Description
GTLP2T152 General Description
The GTLP2T152 is a 2-bit transceiver that provides LVTTL-to-GTLP signal level translation. Data directional control ishandled with a transmit/receive pin. High-speed backplaneoperation is a direct result of GTLP's reduced output swing(<1V), reduced input threshold levels and output edge ratecontrol. The edge rate control minimizes bus-settling time.GTLP is a Fairchild Semiconductor derivative of the Gun-ning Transistor logic(GTL) JEDEC standard JESD8-3.Fairchild's GTLP has internal edge-rate control and is pro-cess, voltage and temperature compensated. GTLP's I/Ostructure is similar to GTL and BTL but offers different out-put levels and receiver threshold. Typical GTLP output volt-age levels are: VOL = 0.5V, VOH = 1.5V, and VREF =1V.
GTLP2T152 Maximum Ratings
Supply Voltage (VCC) ...............................−0.5V to +4.6V
DC Input Voltage (VI)............................ ...−0.5V to +4.6V
DC Output Voltage (VO)
Outputs 3-STATE .......................................−0.5V to +4.6V
Outputs Active (Note 2) .............................−0.5V to +4.6V
DC Output Sink Current into
A Port IOL ................................................................48 mA
DC Output Source Current from
A Port IOH .............................................................−48 mA
DC Output Sink Current into
B Port in the LOW State, IOL .................................100 mA
DC Input Diode Current (IIK)
VI< 0V ....................................................................−50 mA
DC Output Diode Current (IOK)
VO < 0V.................................................................. −50 mA
ESD Rating.............................................................. >2000V
Storage Temperature (TSTG) ......................−65 to +150
DC Input Voltage (VI)............................ ...−0.5V to +4.6V
DC Output Voltage (VO)
Outputs 3-STATE .......................................−0.5V to +4.6V
Outputs Active (Note 2) .............................−0.5V to +4.6V
DC Output Sink Current into
A Port IOL ................................................................48 mA
DC Output Source Current from
A Port IOH .............................................................−48 mA
DC Output Sink Current into
B Port in the LOW State, IOL .................................100 mA
DC Input Diode Current (IIK)
VI< 0V ....................................................................−50 mA
DC Output Diode Current (IOK)
VO < 0V.................................................................. −50 mA
ESD Rating.............................................................. >2000V
Storage Temperature (TSTG) ......................−65 to +150
GTLP2T152 Features
Bidirectional interface between GTLP and LVTTL logiclevels
Designed with edge rate control circuitry to reduce out-
put noise on the GTLP port
VREF pin provides external supply reference voltage for
receiver threshold adjustibility
Special PVT compensation circuitry to provide consis-
tent performance over variations of process, supply volt-age and temperature
TTL compatible driver and control inputs
Designed using Fairchild advanced BiCMOS technology
Bushold data inputs on A port to eliminate the need for
external pull-up resistors for unused inputs
Power up/down and power off high impedance for liveinsertion
Open drain on GTLP to support wired-or connection
Flow through pinout optimizes PCB layout
A Port source/sink −24mA/+24mA
B Port sink +50mA
Designed with edge rate control circuitry to reduce out-
put noise on the GTLP port
VREF pin provides external supply reference voltage for
receiver threshold adjustibility
Special PVT compensation circuitry to provide consis-
tent performance over variations of process, supply volt-age and temperature
TTL compatible driver and control inputs
Designed using Fairchild advanced BiCMOS technology
Bushold data inputs on A port to eliminate the need for
external pull-up resistors for unused inputs
Power up/down and power off high impedance for liveinsertion
Open drain on GTLP to support wired-or connection
Flow through pinout optimizes PCB layout
A Port source/sink −24mA/+24mA
B Port sink +50mA
GTLP2T152 Connection Diagram
GTLP2T152
PDF/DataSheet Download
- Datasheet: GTLP2T152
- File Size: 116882 KB
- Manufacturer: FAIRCHILD [Fairchild Semiconductor]
- Click here to Download
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