HCF4094BM1_1183347

PinoutSpecifications Symbol Parameter Value Unit VDD Supply Voltage -0.5 to +22 V VI DC Input Voltage -0.5 to VDD + 0.5 V II DC Input Current ± 10 mA PD Power Dissipation per Package 500(*) mW Power Dissipation per Output Transistor 100 mW Top Operating ...

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SeekIC No. : 004359698 Detail

HCF4094BM1_1183347: PinoutSpecifications Symbol Parameter Value Unit VDD Supply Voltage -0.5 to +22 V VI DC Input Voltage -0.5 to VDD + 0.5 V II DC Input Current ± 10 mA PD Power Dissipa...

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Part Number:
HCF4094BM1_1183347
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/5

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VDD Supply Voltage -0.5 to +22 V
VI DC Input Voltage -0.5 to VDD + 0.5 V
II DC Input Current ± 10 mA
PD Power Dissipation per Package 500(*) mW
Power Dissipation per Output Transistor 100 mW
Top Operating Temperature -55 to +125
Tstg Storage Temperature -65 to +150

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
All voltage values are referred to VSS pin voltage.
(*) 500mW at 65 °C; derate to 300mW by 10mW/°Cfrom65°Cto85°C




Description

The HCF4094B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4094B is an 8 stages serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transition. The data in each shift register stage is transferred to the storage register when the STROBE input is high.Data in the storage register appears at the outputs whenever the OUTPUT-ENABLE signal is high.Two serial outputs are available for cascading a number of HCF4094B devices. Data is available at the QS serial output terminal on positive clock edges to allow for high speed operation in cascaded system in which the clock rise time is fast. The same serial nformation, available at the Q'S terminal on the next negative clock edge,provides a means for cascading HCF4094B devices when the clock rise time is slow.




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