HCTS574MS

Features: • 3 Micron Radiation Hardened CMOS SOS• Total Dose 200K RAD (Si)• SEP Effective LET No Upsets: >100 MEV-cm2/mg• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)• Dose Rate Survivability: >1 x 1012 RAD (Si)/s• Dose Rate Upset &...

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SeekIC No. : 004359967 Detail

HCTS574MS: Features: • 3 Micron Radiation Hardened CMOS SOS• Total Dose 200K RAD (Si)• SEP Effective LET No Upsets: >100 MEV-cm2/mg• Single Event Upset (SEU) Immunity < 2 x 10-9 E...

floor Price/Ceiling Price

Part Number:
HCTS574MS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/4

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Product Details

Description



Features:

• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
   - Bus Driver O11utputs - 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
   - VIL = 0.8V Max
   - VIH = VCC/2 Min
• Input Current Levels Ii 5A at VOL, VOH



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . ..±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . ..-65 to +150
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . .  . . . ..+175
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... Class 1

CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.



Description

The Intersil HCTS574MS is a Radiation Hardened non-inverting octal D-type, positive edge triggered flip-flop with three-stateable outputs. The HCTS574MS utilizes advanced CMOS/SOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). Data is also transferred to the outputs during this transition. The output enable (OE) controls the three-state outputs and is independent of the register operation. When the output enable is high, the outputs are in the high impedance state.

The HCTS574MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS574MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).




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