HD74HCT240

Features: ` LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility` High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF)` High Output Current: Fanout of 15 LSTTL Loads` Wide Operating Voltage: VCC = 4.5 to 5.5 V` Low Input Current: 1 A max` Low Quiescent Supply Current:...

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HD74HCT240 Picture
SeekIC No. : 004360663 Detail

HD74HCT240: Features: ` LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility` High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF)` High Output Current: Fanout of 15 LSTTL Loads` W...

floor Price/Ceiling Price

Part Number:
HD74HCT240
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/18

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Product Details

Description



Features:

`  LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
`  High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF)
`  High Output Current: Fanout of 15 LSTTL Loads
`  Wide Operating Voltage: VCC = 4.5 to 5.5 V
`  Low Input Current: 1 A max
`  Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25)



Pinout

  Connection Diagram


Specifications

Item Symbol Rating Unit
Supply voltage range VCC 0.5 to +7.0 V
Input voltage VIN 0.5 to VCC + 0.5 V
Output voltage VOUT 0.5 to VCC + 0.5 V
DC current drain per pin IOUT ±35 mA
DC current drain per VCC, GND ICC, IGND ±75 mA
DC input diode current IIK ±20 mA
DC output diode current IOK ±20 mA
Power dissipation per package PT 500 mW
Storage temperature Tstg 65 to +150



Description

The HD74HCT240 is an inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.


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