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Part Number: HM5212325F

 

 

 

 

Description: The Hitachi HM5212325F is a 128-Mbit SDRAM organized as 1048576-word ×32-bit× 4-bank. All inputs and outputs are referr...


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HM5212325F General Description


The Hitachi HM5212325F is a 128-Mbit SDRAM organized as 1048576-word ×32-bit× 4-bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 108 bump BGA.

HM5212325F Maximum Ratings

Parameter Symbol Value Unit Note
Voltage on any pin relative to VSS VT 0.5 to VCC + 0.5
( 4.6 (max))
V 1
Supply voltage relative to VSS VCC 0.5 to +4.6 V 1
Short circuit output current Iout 50 mA  
Operating temperature Topr 0 to +70 (Tj max = 110) °C  
Operating temperature Tstg 55 to +125 °C  

HM5212325F Features

` Single chip wide bit solution (* 32)
` 3.3 V power supply
` Clock frequency: 100 MHz (max)
` LVTTL interface
` Extremely small foot print: 1.27 mm pitch
    - Package: BGA (BP-108)
` 4 banks can operate simultaneously and independently
` Burst read/write operation and burst read/single write operation capability
` Programmable burst length: 4/8/full page
` 2 variations of burst sequence
    - Sequential (BL = 4/8/full page)
    - Interleave (BL = 4/8)
` Programmable CAS latency: 2/3
` Byte control by DQMB
` Refresh cycles: 4096 refresh cycles/64 ms
` 2 variations of refresh
    - Auto refresh
    - Self refresh
`  Full page burst length capability
   - Sequential burst
   - Burst stop capability

HM5212325F Connection Diagram

HM5212325F  Connection Diagram

HM5212325F datasheet

HM5212325F
PDF/DataSheet Download

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