HM530281R

The HM530281R series memory products provide completely asynchronous I/O and operate at the high speed of 50 MHz. The HM530281R series memory products provide reset, jump, and line increment/hold pointer control functions that can be used in synchronization with independent clocks on each of the I/O ports. Memory can be accessed immediately without any waiting period after the execution of these functions. In addition to the FIFO function, the 281R series products support an address structure that is compatible with HDTV, NTSC, and PAL standards, and can be used in a wide range of applications, such
as noise reducers, TBC (time-based correction), inter-frame YC separation, and special function modes (e.g., multi-freeze, P-in-P) in the digital TV, VCR, and video camera application. They are also appropriate for use as inter-system speed conversion buffer memories in communications systems, as cache memories of HDD and MOD, and as frame buffer of VGA.