HV506DG

The HV506DG/HV506PG/HV506X belong to HV506 family, which is a low-voltage serial to high-voltage parallel converter with push-pull outputs. It is especially suitable for use as a symmetric row driver in AC thin-film electroluminescent (ACTFEL) displays. When the data reset pin (DRIO) is at logic high, HV506DG will reset all the outputs of the internal shift register to zero. At the same time, the output of the shift register will start shifting a logic high from the least significant bit to the most significant bit. The DRIO can be triggered at any time. The DIR pin controls the direction of data through the device. When DIR is at logic high, DRIOA is the input and DRIOB isthe output. When DIR-is-grounded, DRIOB isthe input and the DRIOA is the output. See the Output Sequence Operation Table for output sequence. The POL and OE pins of HV506DG perform the polarity select and output enable function respectively. Data is clocked through the shift register loaded on the-low to high transition-of-the clock. A logic high in the shift register will cause the other corresponding output to swing to VDD if POL is high, or to VSS if POL is low. All other outputs will be in the High-Z state. If OE is at logic high all outputs will be in the High-Z state. An output in the High-Z state may block up to 275v above VSS or 275V below VDD. The DP/DN pins are for the positive/negative discharge of the high voltage output HVOUT. Data output buffers are provided for cascading devices. LVDD requires low current for the HV506DG logic section. VDD requires high current for the output section Typically these two pins are at the same potential. The same current and potential conditions applytothe LVSS, logic, and VSS, output pins. Vsub must always be equal or greater than the most positive supply.

The features of HV506DG can be summarized as (1)processed with HVDI technology; (2)symmetric row drive; (3)output voltage up to 275V; (4)source/sink current 300mA; (5)shift register speed 3MHz; (6)Pin-programmable shift direction (DIR); (7)Hi-Rel processing available.

The absolute maximum ratings of HV506DG are (1)logic supply voltage, LVDD: -05V to +15V; (2)output supply voltage, VDD: -05V to +15V; (3)substrate bias voltage, Vsub: See Note 3; (4)output voltage, HVOUT: ±300V; (5)logic input levels: -05V to VDD +05V; (6)continuous total power dissipationg Ceramic 1900mW/Plastic 1200mW; (7)operating temperature range Plastic -40°C to +85°C/ Ceramic -55°C to +125°C; (8)storage temperature range: -65°C to +150°C; (9)lead temperature 16mm (1/16 inch) from case for 10 seconds: 260°C