HV66

Features: · Processed with HVCMOS® technology· 32 push-pull CMOS output up to 32V· Low power level shifting· Source/sink current minimum 1mA· Shift register speed 5MHz· Latched data outputs· Bidirectional shift register (DIR)· Backplane outputPinoutSpecificationsSupply voltage, VDD2 -0.5V to +...

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HV66 Picture
SeekIC No. : 004367581 Detail

HV66: Features: · Processed with HVCMOS® technology· 32 push-pull CMOS output up to 32V· Low power level shifting· Source/sink current minimum 1mA· Shift register speed 5MHz· Latched data outputs· Bid...

floor Price/Ceiling Price

Part Number:
HV66
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

· Processed with HVCMOS® technology
· 32 push-pull CMOS output up to 32V
· Low power level shifting
· Source/sink current minimum 1mA
· Shift register speed 5MHz
· Latched data outputs
· Bidirectional shift register (DIR)
· Backplane output



Pinout

  Connection Diagram


Specifications

Supply voltage, VDD2                       -0.5V to +7.0V
Output voltage, VPP2                        -0.5V to +35V
Logic input levels2                   -0.5V to VDD + 0.5V
Ground current3                                             1.5A
Continuous total power dissipation4          1200mW
Operating temperature range          -40 to +85
Storage temperature range           -65 to +125
Lead temperature 1.6mm (1/16 inch)         260°C
from case for 10 seconds
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at these extremes.
2. All voltages are referenced to VSS.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25°C ambient derate linearly to 85°C at 20mW/°C.



Description

The HV66 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. This device has been designed for use as a driver circuit for LCD displays. It can also be used in any application requiring multiple output high-voltage current sourcing and sinking capabilities. The inputs are fully CMOS compatible.

The device HV66 consists of a 32-bit shift register, 32 latches, and control logic to perform blanking and polarity control of the outputs. HVout1 is connected to the first stage of the shift register. Data is shifted through the shift register on the logic rising transition of the clock. A DIR pin causes data shifting counterclockwise when grounded and clockwise when connected to VDD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blank) or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored after LE transitions from high to low.

The blank signal, BL, when pulled low, will set all outputs of HV66 to the same state as the BPOUT. If this signal is left open then the BL defaults to a high state.




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