HV7224

Features: · Processed with HVCMOS® technology· Symmetric row drive (reduces latent imaging in ACTFEL displays) · Output voltage up to 240V· Low-power level shifting· Source/Sink current 70mA (min.)· Shift Register Speed 3MHz· Pin-programmable shift direction (DIR, SHIFT)· Hi-Rel processing ava...

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HV7224 Picture
SeekIC No. : 004367596 Detail

HV7224: Features: · Processed with HVCMOS® technology· Symmetric row drive (reduces latent imaging in ACTFEL displays) · Output voltage up to 240V· Low-power level shifting· Source/Sink current 70mA (mi...

floor Price/Ceiling Price

Part Number:
HV7224
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

· Processed with HVCMOS® technology
· Symmetric row drive (reduces latent imaging
in ACTFEL displays)
· Output voltage up to 240V
· Low-power level shifting
· Source/Sink current 70mA (min.)
· Shift Register Speed 3MHz
· Pin-programmable shift direction (DIR, SHIFT)
· Hi-Rel processing available




Pinout

  Connection Diagram


Specifications

Supply voltage, VDD1                                   -0.5V to +7V
Supply voltage, VPP                                 -0.5V to +260V
Logic input levels                               -0.5V to VDD +0.5V
Continuous total power dissipation 2      Plastic   1200mW
                                                         Ceramic   1900mW
Operating temperature range      Plastic     -40 to +85
                                              Ceramic   -55 to +125
Storage temperature range                     -65 to +150
Lead temperature 1.6mm (1/16 inch)                     260
from case for 10 seconds
Notes:
1. All voltages are referenced to GND.
2. For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C for plastic and at 19mW/°C for ceramic.



Description

The HV7224 is a low-voltage serial to high-voltage parallel converters with push-pull outputs. It is especially suitable for use as a symmetric row driver in AC thin-film electroluminescent (ACTFEL) displays.

When the data reset pin (DRIO) is at logic high, HV7224 will reset all the outputs of the internal shift register to zero. At the same time, the output of the shift register will start shifting a logic high from the least significant bit to the most significant bit. The DRIO can be triggered at any time. The DIR and SHIFT pins control the direction of data shift through the device. When DIR is at logic high, DRIOA is the input and DRIOB is the output. When DIR is grounded, DRIOB is the input and the DRIOA is the output. See the Output Sequence Operation Table for output sequence. The POL and OE pins perform the polarity select and output enable function respectively. Data is loaded on the low to high transition of the clock. A logic high will cause the output to swing to VPP if POL is high, or to GND if POL is low. All outputs of HV7224 will be in High- Z state if OE is at logic high. Data output buffers are provided for cascading devices.




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