HY27SG082G2M

Features: HIGH DENSITY NAND FLASH MEMORIES -Cost effective solutions for mass storage applications NAND INTERFACE - x8 or x16 bus width. - Multiplexed Address/ Data - Pinout compatibility for all densitiesSUPPLY VOLTAGE - 3.3V device: VCC = 2.7 to 3.6V : HY27UGXX2G2M - 1.8V device: VCC = 1.7 to 1....

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SeekIC No. : 004368152 Detail

HY27SG082G2M: Features: HIGH DENSITY NAND FLASH MEMORIES -Cost effective solutions for mass storage applications NAND INTERFACE - x8 or x16 bus width. - Multiplexed Address/ Data - Pinout compatibility for all de...

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Part Number:
HY27SG082G2M
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/7/16

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Product Details

Description



Features:

HIGH DENSITY NAND FLASH MEMORIES
   - Cost effective solutions for mass storage applications
NAND INTERFACE
   - x8 or x16 bus width.
   - Multiplexed Address/ Data
   - Pinout compatibility for all densities
SUPPLY VOLTAGE
   - 3.3V device: VCC = 2.7 to 3.6V : HY27UGXX2G2M
   - 1.8V device: VCC = 1.7 to 1.95V : HY27SGXX2G2M
Memory Cell Array
   = (2K+ 64) Bytes x 64 Pages x 2,048 Blocks
   = (1K+32) Words x 64 pages x 2,048 Blocks
PAGE SIZE
   - x8 device : (2K + 64 spare) Bytes: HY27(U/S)G082G2M
   - x16 device: (1K + 32 spare) Words: HY27(U/S)G162G2M
BLOCK SIZE
   - x8 device: (128K + 4K spare) Bytes
   - x16 device: (64K + 2K spare) Words
PAGE READ / PROGRAM
   - Random access: 25us (max.)
   - Sequential access: 50ns (min.)
   - Page program time: 300us (typ.)
COPY BACK PROGRAM MODE
   - Fast page copy without external buffering
CACHE PROGRAM MODE
   - Internal Cache Register to improve the program throughput
FAST BLOCK ERASE
   - Block erase time: 2ms (Typ.)
STATUS REGISTER
ELECTRONIC SIGNATURE
   - Manufacturer Code
   - Device Code
CHIP ENABLE DON'T CARE OPTION
   - Simple interface with microcontroller
AUTOMATIC PAGE 0 READ AT POWER-UP OPTION
   - Boot from NAND support
   - Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
   - Program/Erase locked during Power transitions
DATA INTEGRITY
   - 100,000 Program/Erase cycles
   - 10 years Data Retention
PACKAGE
   - HY27(U/S)G(08/16)2G2M-T(P): 48-Pin TSOP1 (12 x 20 x 1.2 mm)
   - HY27(U/S)G(08/16)2G2M-T (Lead)
   - HY27(U/S)G(08/16)2G2M-TP (Lead Free)
   - HY27(U/S)G(08/16)1G2M-V(P): 48-Pin WSOP1 (12 x 17 x 0.7 mm)
   - HY27(U/S)G(08/16)2G2M-V (Lead)
   - HY27(U/S)G(08/16)2G2M-VP (Lead Free)
   - HY27(U/S)G(08/16)1G2M-F(P): 63-Ball FBGA (9.5 x 12 x 1.2 mm)
   - HY27(U/S)G(08/16)2G2M-F (Lead)
   - HY27(U/S)G(08/16)2G2M-FP (Lead Free)



Pinout

  Connection Diagram


Description

The HYNIX HY27SG082G2M series is a 256Mx8bit with spare 8Mx8 bit capacity. The device is offered in 1.8V Vcc Power Supply and in 3.3V Vcc Power Supply.

HY27SG082G2M's NAND cell provides the most cost-effective solution for the solid state mass storage market.

The HY27SG082G2M memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased.

The device HY27SG082G2M contains 2048 blocks, composed by 64 pages consisting in two NAND structures of 32 series connected Flash cells.A program operation allows to write the 2112-byte page in typical 300us and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device) block.
Data in the page mode can be read out at 50ns cycle time per word. The I/O pins serve as the ports for address and data input/output as well as command input. This HY27SG082G2M interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of footprint.Commands, Data and Addresses are synchronously introduced using CE#, WE#, ALE and CLE input pin.

The HY27SG082G2M on-chip Program/Erase Controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data.The modifying can be locked using the WP# input pin or using the extended lock block feature described later.

The output pin RB# (open drain buffer) signals the status of the device HY27SG082G2M during each operation. In a system with multiple memories the RB# pins can be connected all together to provide a global status signal.

Even the write-intensive systems can take advantage of the HY27SG082G2M extended reliability of 100K program/ erase cycles by providing ECC (Error Correcting Code) with real time mapping-out algorithm.

Optionally the chip could be offered with the CE# don't care function. This HY27SG082G2M option allows the direct download of the code from the NAND Flash memory device by a microcontroller, since the CE# transitions do not stop the read operation.

The HY27SG082G2M copy back function allows the optimization of defective blocks management: when a page program operation fails the data can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase.

The cache program feature allows the data insertion in the cache register while the data register is copied into the flash array. This pipelined program operation improves the program throughput when long files are written inside the memory of HY27SG082G2M.

A cache read feature is also implemented. This HY27SG082G2M feature allows to dramatically improve the read throughput when consecutive pages have to be streamed out.

This device HY27SG082G2M includes also extra features like OTP/Unique ID area, Automatic Read at Power Up, Read ID2 extension.

The HYNIX HY27SG082G2M series is available in 48 - TSOP1 12 x 20 mm , 48 - WSOP1 12 x 17 mm,FBGA 9.5 x 12 mm.




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