Purchase HY5PS12421FP, In-stock HY5PS12421FP From SeekIC.
Part Number: HY5PS12421FP
Description: 1.1 Device Features and Ordering Information1.1.1 Key Feaures1.1.2 Ordering Information1.1.3 Ordering Frequ...
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HY5PS12421FP
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DataSheet
General Description
HY5PS12421FP General Description
1.1 Device Features and Ordering Information
1.1.1 Key Feaures
1.1.2 Ordering Information
1.1.3 Ordering Frequency
1.2 Pin configuration
1.3 Pin Description
HY5PS12421FP Maximum Ratings
| Symbol | Parameter | Rating | Units | Notes |
| VDD | Voltage on VDD pin relative to Vss | - 1.0 V ~ 2.3 V | V | 1 |
| VDDQ | Voltage on VDDQ pin relative to Vss | - 0.5 V ~ 2.3 V | V | 1 |
| VDDL | Voltage on VDDL pin relative to Vss | - 0.5 V ~ 2.3 V | V | 1 |
| VIN, VOUT | Voltage on any pin relative to Vss | - 0.5 V ~ 2.3 V | V | 1 |
| TSTG | Storage Temperature | -55 to +100 | 1, 2 |
1.Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Storage Temperature is the case surface temperature on the denter/top side of the DRAM. For the measurement conditions. Please refer to JESD51-2 standard.
HY5PS12421FP Features
• VDD=1.8V
• VDDQ=1.8V +/- 0.1V
• All inputs and outputs are compatible with SSTL_18 interface
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS)
• Differential Data Strobe (DQS, DQS)
• Data outputs on DQS, DQS edges when read (edged DQ)
• Data inputs on DQS centers when write(centered DQ)
• On chip DLL align DQ, DQS and DQS transition with CK transition
• DM mask write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched
on the rising edges of the clock
• Programmable CAS latency 3, 4, 5 and 6 supported
• Programmable additive latency 0, 1, 2, 3, 4 and 5 supported
• Programmable burst length 4/8 with both nibble sequential and interleave mode
• Internal four bank operations with single pulsed RAS
• Auto refresh and self refresh supported
• tRAS lockout supported
• 8K refresh cycles /64ms
• JEDEC standard 60ball FBGA(x4/x8) & 84ball FBGA(x16)
• Full strength driver option controlled by EMRS
• On Die Termination supported
• Off Chip Driver Impedance Adjustment supported
• Read Data Strobe suupported (x8 only)
• Self-Refresh High Temperature Entry
• Lead Free Package
• VDDQ=1.8V +/- 0.1V
• All inputs and outputs are compatible with SSTL_18 interface
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS)
• Differential Data Strobe (DQS, DQS)
• Data outputs on DQS, DQS edges when read (edged DQ)
• Data inputs on DQS centers when write(centered DQ)
• On chip DLL align DQ, DQS and DQS transition with CK transition
• DM mask write data-in at the both rising and falling edges of the data strobe
• All addresses and control inputs except data, data strobes and data masks latched
on the rising edges of the clock
• Programmable CAS latency 3, 4, 5 and 6 supported
• Programmable additive latency 0, 1, 2, 3, 4 and 5 supported
• Programmable burst length 4/8 with both nibble sequential and interleave mode
• Internal four bank operations with single pulsed RAS
• Auto refresh and self refresh supported
• tRAS lockout supported
• 8K refresh cycles /64ms
• JEDEC standard 60ball FBGA(x4/x8) & 84ball FBGA(x16)
• Full strength driver option controlled by EMRS
• On Die Termination supported
• Off Chip Driver Impedance Adjustment supported
• Read Data Strobe suupported (x8 only)
• Self-Refresh High Temperature Entry
• Lead Free Package
HY50P
PDF/DataSheet Download
- Datasheet: HY50P
- File Size: 121146 KB
- Manufacturer: LEM [LEM]
- Click here to Download
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