Purchase IC42S32202L, In-stock IC42S32202L From SeekIC.
Part Number: IC42S32202L
Description: The ICSI IC42S32202 and IC42S32202L is a high-speed CMOS configured as a quad 512K x 32 DRAM with a synchronous interfa...
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IC42S32202L
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DataSheet
General Description
IC42S32202L General Description
The ICSI IC42S32202 and IC42S32202L is a high-speed CMOS configured as a quad 512K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal,CLK).
Each of the 512K x 32 bit banks is organized as 2048 rows by 256 columns by 32 bits.Read and write accesses start at a selected locations in a programmed sequence. Accesses begin with the registration of a BankActive command which is then followed by a Read or Write command
The ICSI IC42S32202 and IC42S32202L provides for programmable Read or Write burst lengths of 1,2,4,8,or full page, with a burst termination operation. An auto precharge function may be enable to provide a self-timed row precharge that is initiated at the end of the burst sequence.The refresh functions,either Auto or Self Refresh are easy to use.
By having a programmable mode register,the system can choose the most suitable modes to maximize its performance.
These devices are well suited for applications requiring high memory bandwidth.
IC42S32202L Features
· Concurrent auto precharge
· Clock rate:166/143/125 MHz
· Fully synchronous operation
· Internal pipelined architecture
· Four internal banks (512K x 32bit x 4bank)
· Programmable Mode
-CAS#Latency:2 or 3
-Burst Length:1,2,4,8,or full page
-Burst Type:interleaved or linear burst
-Burst-Read-Single-Write
· Burst stop function
· Individual byte controlled by DQM0-3
· Auto Refresh and Self Refresh
· 4096 refresh cycles/64ms
· Single +3.3V ±0.3V power supply
· Interface:LVTTL
· Package:400 x 875 mil,86 Pin TSOP-2,0.50mm Pin Pitch and 11x13mm, 90 Ball BGA, Ball pitch 0.8mm
· Pb-free package is available.
· Clock rate:166/143/125 MHz
· Fully synchronous operation
· Internal pipelined architecture
· Four internal banks (512K x 32bit x 4bank)
· Programmable Mode
-CAS#Latency:2 or 3
-Burst Length:1,2,4,8,or full page
-Burst Type:interleaved or linear burst
-Burst-Read-Single-Write
· Burst stop function
· Individual byte controlled by DQM0-3
· Auto Refresh and Self Refresh
· 4096 refresh cycles/64ms
· Single +3.3V ±0.3V power supply
· Interface:LVTTL
· Package:400 x 875 mil,86 Pin TSOP-2,0.50mm Pin Pitch and 11x13mm, 90 Ball BGA, Ball pitch 0.8mm
· Pb-free package is available.
IC42S32202L Connection Diagram
IC42S32202L-8BIG
PDF/DataSheet Download
- Datasheet: IC42S32202L-8BIG
- File Size: 766920 KB
- Manufacturer: ICSI [Integrated Circuit Solution Inc]
- Click here to Download
- ·IC41C16100A
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100A-50K
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100A-50T
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100A-60K
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100A-60T
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100AS
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100AS-50K
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
- ·IC41C16100AS-50T
- ICSI [Integrated Circuit Solution Inc]
- 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
- 237271 KB
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The IC42S32202 is a high-speed CMOS configured as a quad 512K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal,CLK).Each of the 512K x 32 bit banks is organized as 2048 rows by 256 columns by 32 bits...
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