ICS662-03

Features:

• Packaged in 8 pin SOIC
• HDTV clock input
• Low phase noise
• Exact (0 ppm) multiplication ratios
• Support for 256 and 384 times sampling rate
• Supports 27 MHz output for video (MPEG)


Pinout




Description

The ICS662-03 provides synchronous clock generation  for audio sampling clock rates derived from an HDTV  stream. The device uses the latest PLL technology to  provide superior phase noise and long term jitter  performance. The device also supports a 27 MHz  output clock for video MPEG applications from an  HDTV reference clock.

Please contact ICS of the ICS662-03 if you have a requirement for an  input and output frequency not included here.