Features: • 5 differential 2.5V/3.3V LVPECL outputs• Selectable differential CLK0, nCLK0 or LVCMOS inputs• CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL• CLK1 can accept the following input levels: LVCMOS or LVTTL̶...
ICS85314I-01: Features: • 5 differential 2.5V/3.3V LVPECL outputs• Selectable differential CLK0, nCLK0 or LVCMOS inputs• CLK0, nCLK0 pair can accept the following differential input levels: LVPE...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...

The ICS85314I-01 is a low skew, high performance 1-to-5 Differential-to-2.5V/3.3V LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS85314I-01 has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels. The single-ended CLK1 can accept LVCMOS or LVTTL input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the ICS85314I-01 ideal for those applications demanding well defined performance and repeatability.