IDT54/74FCT646

The IDT54/74FCT646/A/C consists of a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The IDT54/74FCT646/A/C utilizes the enable control (G )and direction (DIR) pins to control the transceiver functions.

SAB and SBA control pins are provided to select either real time or stored data transfer.  The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and realtime data.  A LOW input level selects real-time data and a
HIGH selects stored data.

Data on the A or B data bus or both of the IDT54/74FCT646 can be stored in the internal D flip flops by LOW-to-HIGH transitions at the appropriate clock pins (CPAB or CPBA) regardless of the select or enable control pins.