IDT7024S General Description
IDT7024S Features
True Dual-Ported memory cells which allow simulta-neous access of the same memory location
High-speed access
-Military: 20/25/35/55/70ns (max.)
-Commercial: 15/17/20/25/35/55ns (max.)
Low-power operation
-IDT7024
Active: 750mW (typ.)
Standby: 5mW (typ.)
-IDT7024
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for multiplexed bus compatibility
IDT7024 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device
M/S = H for BUSY output flag on Master
M/S = L for BUSY input on Slave
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports
Devices are capable of withstanding greater than 2001V electrostatic discharge.
Fully asynchronous operation from either port
Battery backup operation 2V data retentio
TTL-compatible, single 5V (±10%) power supply
Available in 84-pin PGA, 84-pin quad flatpack, 84-pin PLCC, and 100-pin Thin Quad Plastic Flatpack
Industrial temperature range (-40 to +85) is avail-able, tested to military electrical specifications
IDT7024S Connection Diagram
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