IDT7025S/L General Description
IDT7025S/L Maximum Ratings
IDT7025S/L Features
True Dual-Ported memory cells which allow simultaneous reads of the same memory location
High-speed access
Military: 20/25/35/55/70ns (max.)
Industrial: 55ns (max.)
Commercial: 15/17/20/25/35/55ns (max.)
Low-power operation
IDT7025S
Active: 750mW (typ.)
Standby: 5mW (typ.)
IDT7025L
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for multiplexed bus compatibility
using the Master/Slave select when cascading more than one device
M/S = H for BUSY output flag on Master M/S = L for BUSY input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling between ports
Fully asynchronous operation from either port
Battery backup operation-2V data retention
TTL-compatible, single 5V (±10%) power supply
Available in 84-pin PGA, Flatpack, PLCC, and 100-pin Thin Quad Flatpack
Industrial temperature range (40°C to +85°C) is available for selected speeds
IDT7025S/L Connection Diagram
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