IDT71V65703S75BGI

The IDT71V65703S75BGI is 3.3V high-speed 9,437,184-bit (9 Megabit) synchronous SRAMs organized as 256K x 36 / 512K x 18. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus they have been given the name ZBTTM, or Zero Bus Turnaround.

The features of the IDT71V65703S75BGI are: (1)256K x 36, 512K x 18 memory configurations; (2)Supports high performance system speed - 100 MHz; (3)(7.5 ns Clock-to-Data Access); (4)ZBTTM Feature - No dead cycles between write and read; (5)cycles; (6)Internally synchronized output buffer enable eliminates the; (7)need to control OE; (8)Single R/W (READ/WRITE) control pin; (9)4-word burst capability (Interleaved or linear); (10)Individual byte write (BW1 - BW4) control (May tie active); (11)Three chip enables for simple depth expansion; (12)3.3V power supply (±5%); (13)3.3V (±5%) I/O Supply (VDDQ).

The following is about the electrical characteristics of IDT71V65703S75BGI: (1)Terminal Voltage with Respect to GND: -0.5 to +4.6 V; (2)Terminal Voltage with Respect to GND: -0.5 to VDD V; (3)Terminal Voltage with Respect to GND: -0.5 to VDD +0.5 V; (4)Terminal Voltage with Respect to GND: -0.5 to VDDQ +0.5 V; (5)Commercial: 0 to +70 oC; (6)Industrial: -40 to +85 oC; (7)Temperature Under Bias: -55 to +125 oC; (8)Storage Temperature: -55 to +125 oC; (9)Power Dissipation: 2.0 W; (10)DC Output Current: 50 mA.