Features: • 16 x 16 parallel multiplier-accumulator with selectableaccumulation and subtraction• High-speed: 20ns multiply-accumulate time• IDT7210 features selectable accumulation, subtraction,rounding and preloading with 35-bit result• IDT7210 is pin and function compatib...
IDT7210L: Features: • 16 x 16 parallel multiplier-accumulator with selectableaccumulation and subtraction• High-speed: 20ns multiply-accumulate time• IDT7210 features selectable accumulation...
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• 16 x 16 parallel multiplier-accumulator with selectableaccumulation and subtraction
• High-speed: 20ns multiply-accumulate time
• IDT7210 features selectable accumulation, subtraction,rounding and preloading with 35-bit result
• IDT7210 is pin and function compatible with the TRWTDC1010J, TMC2210, Cypress CY7C510, and AMDAM29510
• Performs subtraction and double precision addition andmultiplication
• Produced using advanced CMOS high-performancetechnology
• TTL-compatible
• Available in topbraze DIP, PLCC, Flatpack and Pin GridArray
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing #5962-88733 is listed on thisfunction
• Speeds available:Commercial: L20/25/35/45/55/65
Military: L25/30/40/55/65/75
The IDT7210L is a high-speed, low-power 16 x 16-bit parallelmultiplier-accumulator that is ideally suited for real-time digitalsignal processing applications. Fabricated using CMOSsilicon gate technology, this device offers a very low-poweralternative to existing bipolar and NMOS counterparts, withonly 1/7 to 1/10 the power dissipation and exceptional speed(25ns maximum) performance.
A pin and functional replacement for TRW's TDC1010J the IDT7210L operates from a single 5 volt supply and is compatiblewith standard TTL logic levels. The architecture of the IDT7210L is fairly straightforward, featuring individual input and outputregisters with clocked D-type flip-flop, a preload capabilitywhich enables input data to be preloaded into the outputregisters, individual three-state output ports for the ExtendedProduct (XTP) and Most Significant Product (MSP) and aLeast Significant Product output (LSP) which is multiplexedwith the Y input.
The XIN and YIN data input registers may be specifiedthrough the use of the Two's Complement input (TC) as eithera two's complement or an unsigned magnitude, yielding a fullprecision32-bit result that may be accumulated to a full 35-bitresult. The three output registers Extended Product (XTP),Most Most Significant Product (MSP) and Least SignificantProduct (LSP) are controlled by the respective TSX, TSMand TSL input lines. The LSP output can be routed through YINports.
The Accumulate input (ACC) of the IDT7210L enables the device to performeither a multiply or a multiply-accumulate function. In themultiply-accumulate mode, output data can be added to orsubtracted from previous results. When the Subtraction (SUB)input is active simultaneously with an active ACC, a subtractioncan be performed. The double precision accumulated result isrounded down to either a single precision or single precisionplus 3-bit extended result. In the multiply mode, the ExtendedProductoutput (XTP) is sign extended in the two's complementmode or set to zero in the unsigned mode. The Round (RND)control rounds up the Most Significant Product (MSP) and the3-bit Extended Product (XTP) outputs. When Preload input(PREL) of the IDT7210L is active, all the output buffers are forced into a highimpedancestate (see Preload truth table) and external datacan be loaded into the output register by using the TSX, TSLand TSM signals as input controls.