IDT723673

Features:

* Memory storage capacity:
                           IDT723653 2,048 x 36
                           IDT723663 4,096 x 36
                           IDT723673 8,192 x 36
* Clock frequencies up to 83 MHz (8 ns access time)
* Clocked FIFO buffering data from Port A to Port B
* IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag functions)
* Programmable Almost-Empty and Almost-Full flags; each has five default offsets (8, 16, 64, 256 and 1,024)
* Serial or parallel programming of partial flags
* Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits (byte)


Specifications

Symbol	Rating	Commercial	Unit
VCC	Supply Voltage Range	0.5 to +7.0	V
VI(2)	nput Voltage Range	0.5 to VCC+0.5	V
VO(2)	Output Voltage Range	0.5 to VCC+0.5	V
IIK	Input Clamp Current (VI < 0 or VI > VCC)	±20	mA
IOK	Output Clamp Current (VO = < 0 or VO > VCC)	±50	mA
IOUT	Continuous Output Current (VO = 0 to VCC)	±50	mA
ICC	Continuous Current Through VCC or GND	±400	mA
TSTG	Storage Temperature Range	65 to 150	°C

Description

The IDT723673 is a monolithic, high-speed, low-power, CMOS unidirectional Synchronous (clocked) FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns. The 2,048/4,096/8,192 x 36 dual-port SRAM FIFO buffers data from Port A to Port B. FIFO data on Port B can output in 36-bit, 18-bit, or 9-bit formats with a choice of Big- or Little-Endian configurations.

These devices of the IDT723673 are synchronous (clocked) FIFOs, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.