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Part Number: IDT74ALVCH32245
Description: This 32-bit bus transceiver is built using advanced dual metal CMOS technology. This high-speed, low p...
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IDT74ALVCH32245
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DataSheet
General Description
IDT74ALVCH32245 General Description
This 32-bit bus transceiver is built using advanced dual metal CMOS technology. This high-speed, low power transceiver is ideal for asynchronous communication between two busses (A and B). The Direction and Output Enable controls are designed to operate the device as either four independent 8-bit transceivers or one 32-bit transceiver. The direction control pins (DIR) control the direction of data flow. The output enable pins (OE) override the direction control and disable both ports. All inputs are designed with hysteresis for improved noise margin.
The ALVCH32245 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
The ALVCH32245 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
IDT74ALVCH32245 Maximum Ratings
|
Symbol |
Description |
Max |
Unit |
|
VTERM(2) |
Terminal Voltage with Respect to GND |
0.5 to +4.6 |
V |
|
VTERM(3) |
Terminal Voltage with Respect to GND |
0.5 to VCC+0.5 |
V |
|
TSTG |
Storage Temperature |
65 to +150 |
°C |
|
IOUT |
DC Output Current |
50 to +50 |
mA |
|
IIK |
Continuous Clamp Current, VI < 0 or VI > VCC |
±50 |
mA |
|
IOK |
Continuous Clamp Current, VO < 0 |
-50 |
mA |
|
ICC ISS |
Continuous Current through each VCC or GND |
±100 |
mA |
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC.
IDT74ALVCH32245 Features
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4 W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in 96-ball LFBGA package
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4 W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in 96-ball LFBGA package
IDT74ALVCH32245 Typical Application
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
• 3.3V and lower voltage computing systems
IDT74ALVCH32245
PDF/DataSheet Download
- Datasheet: IDT74ALVCH32245
- File Size: 129038 KB
- Manufacturer: IDT [Integrated Device Technology]
- Click here to Download
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