IDT74AUC16374

This 16-bit edge-triggered D-type flip-flop is built using advanced CMOS technology.

The AUC16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the data (D) inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operation of the flip-flop.

Old data can be retained or new data can be entered while the outputs are in the high-impedance state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VDD through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.