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Description: The FCT16501AT/CT/ET and FCT162501AT/CT/ET 18-bit registered transceivers are built using advanced dua...


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IDT74FCT162501CT General Description


The FCT16501AT/CT/ET and FCT162501AT/CT/ET 18-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by outputenable (OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow,the device operates in transparent mode when LEAB is HIGH.When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level.

If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB is the output enable for the B port. Data flow from the B port to the A port is similar but requires using OEBA,LEBA and CLKBA. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.The FCT16501AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

The FCT162501AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce,minimal undershoot, and controlled output fall timesreducing the need for external series terminating resistors. The FCT162501AT/CT/ET are plug-in replacements for the FCT16501AT/CT/ET and ABT16501 for on-board bus interface applications.The FCT162H501AT/CT/ET have "Bus Hold" which retains the input's last state whenever the input goes to high impedance. This prevents "floating" inputs and eliminates the need for pull-up/down resistors.

IDT74FCT162501CT Maximum Ratings

Symbol Rating
Max
Unit
VTERM Terminal Voltage with Respect to
GND
0.5 to +7.0
V
VTERM Terminal Voltage with Respect to
GND
0.5 to VCC +0.5
V
TSTG
Storage Temperature
65 to +150
°C
IOUT
DC Output Current
60 to +120
mA

IDT74FCT162501CT Features

• Common features:
   0.5 MICRON CMOS Technology
   High-speed, low-power CMOS replacement for ABT functions
   Typical tSK(o) (Output Skew) < 250ps
   Low input and output leakage 1A (max.)
   ESD > 2000V per MIL-STD-883, Method 3015;
             > 200V using machine model (C = 200pF, R = 0)
   Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
   Extended commercial range of -40°C to +85°C
• Features for FCT16501AT/CT/ET:
   High drive outputs (-32mA IOH, 64mA IOL)
   Power off disable outputs permit "live insertion"
   Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C
• Features for FCT162501AT/CT/ET:
   Balanced Output Drivers: ±24mA (commercial),±16mA (military)
   Reduced system switching noise
   Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C
• Features for FCT162H501AT/CT/ET:
   Bus Hold retains last active bus state during 3-state
   Eliminates the need for external pull up resistors

IDT74FCT162501CT Connection Diagram

IDT74FCT162501CT  Connection Diagram

IDT74FCT162501CT datasheet

IDT74FCT162501CT
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