IDT74FCT3807D/E

Features: ·Advanced CMOS Technology·Guaranteed low skew < 100ps (max.)·Very low duty cycle distortion< 250ps (max.)·High speed propagation delay< 2ns (max.)·Very low CMOS power levels·TTL compatible inputs and outputs·1:10 fanout·Maximum output rise and fall time < 1ns (max.)·Low input...

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SeekIC No. : 004373042 Detail

IDT74FCT3807D/E: Features: ·Advanced CMOS Technology·Guaranteed low skew < 100ps (max.)·Very low duty cycle distortion< 250ps (max.)·High speed propagation delay< 2ns (max.)·Very low CMOS power levels·TTL c...

floor Price/Ceiling Price

Part Number:
IDT74FCT3807D/E
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

·Advanced CMOS Technology
·Guaranteed low skew < 100ps (max.)
·Very low duty cycle distortion< 250ps (max.)
·High speed propagation delay< 2ns (max.)
·Very low CMOS power levels
·TTL compatible inputs and outputs
·1:10 fanout
·Maximum output rise and fall time < 1ns (max.)
·Low input capacitance: 3pF typical
·VCC = 3.3V ± 0.3
·Inputs can be driven from 3.3V or 5V components
·Operating frequency up to 166MHz
·Available in SSOP and QSOP packages



Pinout

  Connection Diagram


Specifications

Symbol Rating Max. Unit
VCC Input Power Supply Voltage -0.5 to +4.6 V
VI Input Voltage -0.5 to +5.5 V
VO Output Voltage -0.5 to VCC + 0.5 V
TJ Junction Temperature -65 to +150
TSTG Storage Temperature -60 to +60 mA

NOTE:
1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.




Description

The IDT74FCT3807D/E is a 3.3V clock driver built using advanced CMOS technol- gy.  This low skew clock driver offers 1:10 fanout.  The large fanout from a single  nput reduces loading on the preceding driver and provides an efficient clock istribution network.  Multiple power and grounds reduce noise.  Typical pplications are clock and signal distribution.


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