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Part Number: IDT74LVC162827A
Description: The LVC162827A 20-bit buffer is built using advanced dual metal CMOS technology. The 20-bit bus driver...
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IDT74LVC162827A
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General Description
IDT74LVC162827A General Description
The LVC162827A 20-bit buffer is built using advanced dual metal CMOS technology. The 20-bit bus driver provides high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pair of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
The LVC162827A buffer is ideally suited for driving high capacitance loads and low impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.
All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC162827A has been designed with a ±12mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.
IDT74LVC162827A Maximum Ratings
|
Symbol |
Description |
Max |
Unit |
|
VTERM |
Terminal Voltage with Respect to GND |
0.5 to +6.5 |
V |
|
TSTG |
Storage Temperature |
65 to +150 |
°C |
|
IOUT |
DC Output Current |
50 to +50 |
mA |
|
IIK IOK |
Continuous Clamp Current, VI < 0 or VO < 0 |
50 |
mA |
|
ICC ISS |
Continuous Current through each VCC or GND |
±100 |
mA |
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
IDT74LVC162827A Features
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4 W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
• High Output Drivers: ±12mA
• Reduced system switching noise
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4 W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
• High Output Drivers: ±12mA
• Reduced system switching noise
IDT74LVC162827A Typical Application
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
• Data communication and telecommunication systems
IDT74LVC162827A Connection Diagram
IDT74LVC162827A
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- Datasheet: IDT74LVC162827A
- File Size: 67154 KB
- Manufacturer: IDT
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