IDT74LVC16646A

Features: Typical tSK(0)(Output Skew) < 250psESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOPand 0.40mm pitch TVSOP packagesExtended commercial range of -40°C to +85°CVCC= 3.3V ±0.3V, Normal RangeVCC= 2.7V to 3....

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SeekIC No. : 004373156 Detail

IDT74LVC16646A: Features: Typical tSK(0)(Output Skew) < 250psESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOPand 0.40mm pitch T...

floor Price/Ceiling Price

Part Number:
IDT74LVC16646A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/26

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Product Details

Description



Features:

Typical tSK(0) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
   > 200V using machine model (C = 200pF, R = 0)
   0.635mm pitch SSOP, 0.50mm pitch TSSOP
   and 0.40mm pitch TVSOP packages
Extended commercial range of -40°C to +85°C
VCC = 3.3V ±0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4µW typ. static)
All inputs, outputs and I/O are 5 Volt tolerant



Application

•  5V and 3.3V mixed voltage systems
•  Data communication and telecommunication systems



Pinout

  Connection Diagram


Specifications

Symbol Description Max. Unit
VTERM(2) Terminal Voltage with Respect to GND 0.5 to +6.5 V
VTERM(3) Terminal Voltage with Respect to GND 0.5 to +6.5 V

TSTG

Storage Temperature
65 to +150
IOUT DC Output Current 50 to +50 mA
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
50 mA
ICC
ISS
Continuous Current through
each VCC or GND
±100 mA



Description

The IDT74LVC16646A 16-bit bus transceiver/register is built using advanced dual metal CMOS technology. This high-speed, low power device is organized as two independent 8-bit D-type transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between the A bus and B bus either directly or from the internal storage registers.

Each 8-bit transceiver/register features direction control (DIR) of the IDT74LVC16646A, over-riding Output Enable control (OE ) and Select lines (SAB and SBA) to select either real-time data or stored data. Separate clock inputs are provided for A and B port registers. Data on the A or B data bus, or both, can be stored in the internal registers by the low-to-high transitions at the b appropriate clock pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The IDT74LVC16646A has been designed with a ±24mA output driver. The driver is capable of driving a moderate to heavy load while maintaining speed performance.




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