IDT74LVC16827A

NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

This 20-bit buffer of the IDT74LVC16827A is built using advanced dual metal CMOS technology. The LVC16827A provides high-performance bus interface buffering for wide data/address paths or buses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.

The IDT74LVC16827A buffer is ideally suited for driving high capacitance loads and low impedance backplanes.

All pins can be driven from either 3.3V or 5V devices. This feature allows the use of the device as a translator in a mixed 3.3V/5V supply system. The LVC16827A has been designed with a ±24mA output driver.

The driver of the IDT74LVC16827A is capable of driving a moderate to heavy load while maintainingspeed performance.